x86-64 Assembly
Intel Syntax
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Demonstrates: register moves, system call.
; Linux x86-64: exit(0)
section .text
global _start
_start:
mov rax, 60 ; syscall: exit
mov rdi, 0 ; status
syscall
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Key traits
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CISC
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variable-length instructions
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many addressing modes
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AT&T syntax
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Same behavior, different syntax.
.globl _start
.text
_start:
mov $60, %rax
mov $0, %rdi
syscall
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Notable differences
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source, destination order reversed
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registers prefixed with %
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immediates prefixed with $
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These are syntactic differences only — same machine code.
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ARM (AArch64) Assembly
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Demonstrates: fixed-width RISC instructions and syscall convention.
// Linux AArch64: exit(0)
.global _start
_start:
mov x0, #0 // status
mov x8, #93 // syscall: exit
svc #0
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Key traits
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load/store architecture
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fixed instruction width
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many registers
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RISC-V Assembly
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Modern open ISA.
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open standard
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modular ISA
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growing ecosystem
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Used in:
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research
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embedded
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experimental CPUs
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Demonstrates: very clean RISC design.
# Linux RISC-V: exit(0)
.global _start
_start:
li a0, 0 # status
li a7, 93 # syscall: exit
ecall
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Key traits
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minimal ISA
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highly regular
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open standard
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AVR Assembly
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Demonstrates: simple microcontroller style.
; AVR: infinite loop
.global main
main:
loop:
rjmp loop
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Key traits
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tiny register file
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Harvard architecture
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common in microcontrollers
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PIC Assembly
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Demonstrates: banked register style.
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Generic example
; PIC: infinite loop
org 0x0000
goto $
end
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Key traits
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very small cores
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banked memory
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embedded focus
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